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branching

summary

    This subchapter looks at branching.

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branching

    This subchapter looks at branching. Don’t do anything you see in this subchapter!

    Direct branching was a huge nightmare in early programming. This nightmare was often called “spaghetti programming”, because attempting to follow the logic of a program was often like trying to follow strands of spaghetti in a bowl.

    This problem led directly to the introduction of structured programming and the loop control structures you have just learned.

    So, why am I telling you about this?

    You might use an older programming language, such as APL, which requires that you use direct branching to create the looping structures. You might program at machine or assembly level, where again you have to use unconditional or conditional branching to create your own control structures. Or you might encounter old software where you have actually trace through the spaghetti code for yourself.

    The most common version of this command is the classic GOTO. In some languages you have the option as to whether you write it as GOTO or GO TO.

APL    →B — APL monadic function of the form is →B that transfers control to the statement numbered B.

BASIC    GOTO label — BASIC command that transfers control to the labelled statement. Labels in BASIC are numbers.

C    goto label — C statement that transfers control to the labelled statement. The goto must transfer control to a label that is in the current function.

FORTRAN    GOTO label — FORTRAN command that transfers control to the labelled statement. Labels in FORTRAN are numbers.

Pascal    goto label — Pascal command that transfers control to the labelled statement. Labels in Pascal are numbers from 0 to 9999 inclusive, which must be declared.

PL/I    GO TO label — PL/I command that transfers control to the labelled statement. May be abbreviated GOTO.

assembly language instructions

control registers

    Control registers control some aspect of processor operation. The most universal control register is the program counter.

program counter

    Almost every digital computer ever made uses a program counter. The program counter points to the memory location that stores the next executable instruction. Branching is implemented by making changes to the program counter. Some processor designs allow software to directly change the program counter, but usually software only indirectly changes the program counter (for example, a JUMP instruction will insert the operand into the program counter). An assembler has a location counter, which is an internal pointer to the address (first byte) of the next location in storage (for instructions, data areas, constants, etc.) while the source code is being converted into object code.

    The VAX uses the 16th of 16 general purpose registers as the program counter (PC). Almost the entire instruction set can directly manipulate the program counter, allowing a very rich set of possible kinds of branching.

    The program counter in System/360 and 370 machines is contained in bits 40-63 of the program status word (PSW), which is directly accessible by some instructions.

• IBM 360/370: program counter is bits 40-63 of the program status word (PSW)
• Intel 8086/80286: 16-bit instruction pointer (IP)
• Intel 80386: 32-bit instruction pointer (EIP)
• Motorola 680x0, 68300: 32-bit program counter (PC)

processor flags

    Processor flags store information about specific processor functions. The processor flags are usually kept in a flag register or a general status register. This can include result flags that record the results of certain kinds of testing, information about data that is moved, certain kinds of information about the results of compations or transformations, and information about some processor states. Closely related and often stored in the same processor word or status register (although often in a privileged portion) are control flags that control processor actions or processor states or the actions of certain instructions.

• IBM 360/370: program status word (PSW)
• Intel 8086/80286: 16-bit flag register (FLAGS); system flags, control flag, and status flags)
• Intel 80386: 32-bit flag register (EFLAGS); system flags, control flag, and status flags)
• MIX: an overflow toggle and a comparison indicator
• Motorola 680x0, 68300: 16-bit status register (SR); high byte is system byte and requires privileged access, low byte is user byte or condition code register (CCR)

    A few typical result flags (with processors that include them):

• auxilary carry Set if a carry out of the most significant bit of a BCD operand occurs (binary coded decimal addition). Also commonly set if a borrow occurs in a BCD subtract. Used in Intel 80x86 [AF].
• carry Set if a carry out of the most significant bit of an operand occurs (addition). Also commonly set if a borrow occurs in a subtract. Used in Digital VAX [C], Intel 80x86 [CF], Motorola 680x0 [C], Motorola 68300 [C], Motorola M68HC16 [C].
• comparison indicator contains one of three values: less, equal, or greater. Used in MIX.
• extend Set to the value of the carry bit for arithmetic operations (used to support implementation of multi-byte arithmetic larger than that implemented directly by the hardware. Used in Motorola 680x0 [X], Motorola 68300 [X].
• half carry Set if a carry out of bit 3 of an operand occurs during BCD addition. Used in Motorola M68HC16 [H].
• negative Set if the most significant bit of a result is set. Used in Digital VAX [N], Motorola 680x0 [N], Motorola 68300 [N], Motorola M68HC16 [N].
• overflow Set if arithmetic overflow occurs. Used in Digital VAX [V], Intel 80x86 [OF], Motorola 680x0 [V], Motorola 68300 [V], Motorola M68HC16 [V].
• overflow toggle a single bit that is either on or off. Used in MIX.
• parity For odd parity machines, set to make an odd number of one bits; for an even parity machine, set to make an even number of one bits. Used in Intel 80x86 [PF]. The IBM 360/370 has odd parity on memory.
• sign Set for negative sign. Used in Intel 80x86 [SF].
• trap Set for traps. Used in Intel 80x86 [TF].
• zero Set if a result equals zero. Used in Digital VAX [Z], Intel 80x86 [ZF], Motorola 680x0 [Z], Motorola 68300 [Z], Motorola M68HC16 [Z].

    Some conditions are determined by combining multiple flags. For example, if a processor has a negative flag and a zero flag, the equivalent of a positive flag is the case of both the negative and zero flags both simultaneously being cleared.

    A few typical control flags (with processors that include them):

• decimal overflow trap enable Set if decimal overflow occurs (or conversion error on a VAX). Used in Digital VAX [DV].
• direction flag Determines the direction of string operations (set for autoincrement, cleared for autodecrement). Used in Intel 80x86 [DF].
• floating underflow trap enable Set if floating underflow occurs. Used in Digital VAX [FU].
• integer overflow trap enable Set if integer overflow occurs (or conversion error on a VAX). Used in Digital VAX [IV].
• interupt enable Set if interrupts enabled. Used in Intel 80x86 [IF].
• i/o privilege level Used to control access to I/O instructions and hardware (thereby seperating control over I/O from other supervisor/user states). Two bits. Used in Intel 80x86 [IO PL].
• nested task flag Used in Intel 80x86 [NF].
• resume flag Used in Intel 80x86 [RF].
• virtual 8086 mode Used to switch to virtual 8086 emulation. Used in Intel 80x86 [VM].

See also Registers

program control instructions

    Program control instructions change or modify the flow of a program.

    The most basic kind of program control is the unconditional branch or unconditional jump. Branch is usually an indication of a short change relative to the current program counter. Jump is usually an indication of a change in program counter that is not directly related to the current program counter (such as a jump to an absolute memory location or a jump using a dynamic or static table), and is often free of distance limits from the current program counter.

    The pentultimate kind of program control is the conditional branch or conditional jump. This gives computers their ability to make decisions and implement both loops and algorithms beyond simple formulas.

• BRA Branch; Motorola 680x0, Motorola 68300; short (16 bit) unconditional branch relative to the current program counter
• JMP Jump; Motorola 680x0, Motorola 68300; unconditional jump (any valid effective addressing mode other than data register)
• JMP Jump; Intel 80x86; unconditional jump (near [relative displacement from PC] or far; direct or indirect [based on contents of general purpose register, memory location, or indexed])
• JMP Jump; MIX; unconditional jump to location M; J-register loaded with the address of the instruction which would have been next if the jump had not been taken
• JSJ Jump, Save J-register; MIX; unconditional jump to location M; J-register unchanged
• Jcc Jump Conditionally; Intel 80x86; conditional jump (near [relative displacement from PC] or far; direct or indirect [based on contents of general purpose register, memory location, or indexed]) based on a tested condition: JA/JNBE, JAE/JNB, JB/JNAE, JBE/JNA, JC, JE/JZ, JNC, JNE/JNZ, JNP/JPO, JP/JPE, JG/JNLE, JGE/JNL, JL/JNGE, JLE/JNG, JNO, JNS, JO, JS
• Bcc Branch Conditionally; Motorola 680x0, Motorola 68300; short (16 bit) conditional branch relative to the current program counter based on a tested condition: BCC, BCS, BEQ, BGE, BGT, BHI, BLE, BLS, BLT, BMI, BNE, BPL, BVC, BVS
• JOV Jump on Overflow; MIX; conditional jump to location M if overflow toggle is on; if jump occurs, J-register loaded with the address of the instruction which would have been next if the jump had not been taken
• JNOV Jump on No Overflow; MIX; conditional jump to location M if overflow toggle is off; if jump occurs, J-register loaded with the address of the instruction which would have been next if the jump had not been taken
• Jcc Jump on Condition; MIX; conditional jump to location M based on comparison indicator; if jump occurs, J-register loaded with the address of the instruction which would have been next if the jump had not been taken; JL (less), JE (equal), JG (greater), JGE (greater-or-equal), JNE (unequal), JLE (less-or-equal)
• JAcc Jump on A-register; MIX; conditional jump to location M based on A-register (accumulator); if jump occurs, J-register loaded with the address of the instruction which would have been next if the jump had not been taken; JAN (negative), JAZ (zero), JAP (positive), JANN (nonnegative), JANZ (nonzero, JAMP (nonpositive)
• JXcc Jump on X-register; MIX; conditional jump to location M based on X-register (extension); if jump occurs, J-register loaded with the address of the instruction which would have been next if the jump had not been taken; JXN (negative), JXZ (zero), JXP (positive), JXNN (nonnegative), JXNZ (nonzero, JXMP (nonpositive)
• Jicc Jump on I-register; MIX; conditional jump to location M based on one of five I-registers (index); if jump occurs, J-register loaded with the address of the instruction which would have been next if the jump had not been taken; JiN (negative), JiZ (zero), JiP (positive), JiNN (nonnegative), JiNZ (nonzero, JiMP (nonpositive)

See also Program Control Instructions in Assembly Language

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